Super-FinSim is the top of the line FinSim Verilog
simulator. Ever since the first FinSim Verilog simulator has
been sold in 1993, the FinSim Verilog simulators have
introduced many new features that have become state of the
art in Verilog simulation: mixed Compiled and Interpreted
simulation, simulation Farm that allows one engineer to
manage hundreds of simultaneous simulations, separate and
incremental compilation, high performance save and restart,
direct integration with C code without the need for PLI,
etc. Super FinSim supports the entire Verilog standard IEEE
1364-1995 and many features of IEEE 1364-2001, which are
listed under Support for Verilog 2001.
